Advanced Semiconductor Engineering, Inc. (ASE), a partner of ASE Technology Holding Co., Ltd. and a foremost provider of semiconductor assembly and test facilities, announced the development of a manufacturing-first automated 310mm × 310mm panel-level packaging line, advancing its leadership in next-generation packaging technologies. This milestone expands economies of scale by assisting a seamless changeover from wafer-level packaging to panel-level wrapping while protecting planned rule consistency around FOCoS and FOCoS-Bridge packaging programs. The new panel area is anticipated to enter manufacturing in the first half of 2027.
The declaration additionally accentuates ASE’s promise to allow the semiconductor business’s change into the era of heterogeneous incorporation, where presentation is progressively defined by high-bandwidth, low-latency interfaces around chiplets, high-bandwidth memory (HBM), and ASICs. As AI accelerators and high-performance computing (HPC) devices develop in difficulty, panel-level packaging shows an important innovation to help the roadmap concerning trillion-transistor arrangement-in-package planning. ASE’s industrialized panel-level packing line helps a 310mm × 310mm setup and is consistent with improved packaging platforms, comprising FOCoS and FOCoS-Bridge, offering line/space capacities of 2/2µm and 8/8µm, respectively.
By changing from conventional round wafers to rectangular squares, ASE facilitates a pointedly greater operational area up to 96,100 mm2 per panel, permitting more dies per unit and enhanced resource efficacy. This change to panel-level packaging refers to important industry challenges, comprising growing interposer sizes and rejecting wafer-level effectiveness. The larger panel arrangement helps achieve higher throughput and decreased cycle time, while improving the incorporation of progressively complex multi-die architectures. These advantages are notably impactful for AI data center and HPC usages, where demand for higher package sizes and higher I/O density continues to increase. “ASE is influencing a fundamental change in progressive packaging by establishing an automated panel-level forming platform that notably improves scalability and efficacy,” expressed Dr C. P. Hung, Vice President of Corporate Research and Development at ASE. “This improvement permits advanced incorporation density and helps the developing needs of AI and HPC systems, where execution, power efficacy, and manufacturability must be focused holistically.”
16 June 2026
16 June 2026
16 June 2026
16 June 2026