Advanced Packaging in Spotlight as SEMICON Taiwan 2025 Begins

Advanced Packaging in Focus as SEMICON Taiwan Kicks Off

Image Credits: Global SMT & Packaging

Taipei, with the SEMICON Taiwan 2025 trade event set to start on 10th September, industry consideration has turned to the mass manufacture of progressive packaging skills and dimensions for development in the United States and Taiwan. With outdated ascending attainment physical limits, heterogeneous incorporation and packing technologies have appeared as main resolutions.

Growing demand for AI, high-bandwidth memory (HBM), and high-performance computing (HPC) chips has put technologies like system on integrated chips (SoIC), chip-on-wafer-on-substrate (CoWoS), integrated fan-out (InFO), 3D IC, and fan-out panel-level packaging (FOPLP) at the center of semiconductor invention, making them a key effort at this years trade event, as per industry specialists. Chipmakers are scaling up in size to fulfil this demand, comprising Taiwan Semiconductor Manufacturing Co. (TSMC), which is rapidly growing its packaging potential in both Taiwan and the U.S.

The company now functions with five progressive packaging services in Taiwan and is developing four more, while in the U.S., it is associating with Amkor to build new CoWoS and InFO potential in Arizona as part of its record US$165 billion worldwide venture plan. TSMC Chairman and CEO C.C. Wei expressed that demand for AI chips remains robust, and the industry is committed to closing the gap between the constricted supply of CoWoS progressive packaging and strong market demand. Advanced Semiconductor Engineering (ASE) Holding Co. is similarly ramping up CoWoS lines in Kaohsiung and over subordinate SPIL in central Taiwan, and has promised additional speculation through 2026.

ASE Chief Operating Officer Tien Wu expressed that demand for progressive packaging is only just opening, and the industry strategies to endure growing investment in the sector through 2026. Market estimations propose TSMCs monthly CoWoS output will double to 70,000 wafers by year-end and surpass 90,000 by the end of 2026, as per industry resources. On the challenging side, King Yuan Electronics is raising capital spending to a record NT$37 billion (US$1.21 billion) for AI chip testing. Taiwanese firms are also capitalizing on FOPLP, with Innolux, Powertech, ASE, Hiwin, and Utechzone intensifying processes. Worldwide players like Qualcomm, NXP, STMicroelectronics, and AMD are accepting panel-level packing for power organization and RF chips, with potential AI apps ahead.