Socionext Expands Packaging Portfolio with Advanced 3DIC and 5.5D Technology

Socionext has expanded its semiconductor packaging portfolio with new 3DIC and 5.5D support. The innovation improves performance, reduces power use, and boosts efficiency for AI, HPC, and consumer applications.

Author: Yogesh Kulkarni Published Date: 29 August 2025
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Socionext Expands its Technologically Advanced Packaging Portfolio

Socionext Expands Packaging Portfolio with Advanced 3DIC and 5.5D Technology

Image Credits: Socionext

Announcement

Socionext, the leading solution SoC company, introduced its new 3DIC support as an addition to the portfolio of proven potential for the completion of solutions for consumers. Also, HPC and AI data center applications consist of chiplets 3D, 5.5D, and 2.5D packaging. Socionext encourages customers with an excellent development process and commendable expertise, providing high-performance and quality solutions that leverage success and innovations.

Socionext has progressively graduated with the completion of a packaged device, accelerating TSMCs SoIC-X 3D stacking. The design of the chiplets packaging merges the N3 compute die and the N5 I/O die in an F2F (face-to-face) configuration. The F2F 3D stacking idea shortens the interconnect distance, prominently diminishing power consumption and signal latency in comparison to traditional 2.5D and 2D designs.

Socionext Inc., with its solution SOC business model, has already popularized its existence in the packaging market. This additional support option, in the application, has enhanced the companys packaging portfolio. Technology has effectively transformed various markets, and this addition will serve as another example of successful technological advancement in the companys portfolio.

Socionexts New Tech Innovations Structure

Following the companys excellent experience in 2.5D designs, Socionext initiated design methodologies and experience for the 3DICs. The 3DICs include components to explore major advantages. The 3DIC F2F and 5.5D structure includes heterogeneous integration where 3DICs allow integration of various other technology functions like memory, interface, logic, and nodes (3nm, 5nm,7nm) into an individual package, enabling optimized different solutions identifying cost, density, and performance. It improves performance and reduces power consumption. The vertical stacking design enhances functionality, making it particularly valuable for consumer devices that are used in limited spaces.

Socionexts vision

With the addition of 3DIC and 5.5D support, the company strengthened its packaging portfolio and also reflects the companys sharp focus on enhancing heterogeneous integration, introducing numerous functions within packaging elements, and a unified system of semiconductors. As demand accelerates for high-density, energized platforms and scalability mainly in consumer, data center applications, and AI, 3DICs will play a vital role in reshaping the next-generation semiconductor innovation.

Views and statements from company leaders

CTO and Executive Vice President at Socionext, Rajinder Cheema, said,

“Socionexts long-term experience in the SOC design and our partnership with TSMC puts us directly at the forefront of future SOC development. This milestone underscores our efforts to serve the best-in-class solutions to satisfy our customers.”

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